1. Field of the Invention
The present invention relates to storing, in an integrated circuit, an immutable binary code. The present invention more specifically relates to extraction, from an integrated circuit, a binary code resulting from parameters linked to the manufacturing of this circuit. Such parameters linked to the manufacturing are generally called physical parameters and are then provided by a physical parameter network (PPN). Such a binary code “embedded” in an integrated circuit is used, for example, to avoid its permanent storage, in the form of a digital word, in a register or the like and to prevent detection of this code. In an application to the identification of an electronic element or assembly based on parameters linked to the manufacturing of an identification circuit contained in an integrated circuit chip, this identification is currently designated as an “integrated circuit fingerprint”.
The present invention more specifically relates to extracting a binary code stored in the form of at least partially resistive electric paths and interpreted by flip-flops or the like.
2. Discussion of the Related Art
Examples of circuits for storing such binary codes and for identification of an integrated circuit chip by such codes are described in U.S. Published Application Nos. 2004/0130363 and No. 2004/0125930 which are incorporated herein by reference.
The principle used by these circuits is to have the same electric edge that triggers a reading circulate in different electric paths reaching different flip-flops. According to whether the delay of a given path is shorter or longer than a reference or average delay synchronizing the flip-flop reading, the output state of the corresponding flip-flop is 0 or 1. The outputs of the different flip-flops then provide the binary code stored in the form of electric paths. These electric paths may be made different simply by the length of the tracks forming them, but it is preferable for them to contain a resistive element (in practice associated with a capacitive element formed of the gates of MOS transistors forming the flip-flops) to form an RC cell.
A considerable asset of such a binary code storage is that the code is stored, not directly in digital form, but, in a way, in analog form, which makes its piracy more difficult.
In the above-mentioned circuits, to fulfill the aim of making the code stored by the electric paths invisible, it must be ascertained that the paths are not too different (in terms of length) as compared to the electric path providing the reference delay. In the opposite case, there is a risk of enabling optical detection according to whether the path is obviously longer or shorter than the reference path.
Further, in some cases and in a perfectly random and unpredictable manner, an electric path of one of the flip-flops may, when associated with the propagation of the edge in this flip-flop, exhibit exactly the same delay as the average path. There then is a risk, for this flip-flop, of having a non-reproducible output state from one extraction to another of the binary code.
These two problems with the above-mentioned storage circuits are due to the use of an average delay to synchronize the flip-flop reading.
Another technique for binary code extraction consists of detecting a resistance difference between two branches of a cell. This difference is read by a voltage or current measurement. There again, in the case where the two cell resistances would be identical, a non-reproducible state is obtained from one extraction to another of the binary code.
A problem which arises whatever the read mode (time, current, voltage) is linked to the theoretical risk of having two strictly identical resistances.
Another problem is to make invisible (especially optically) the differences between resistances providing bits of different values.